RC4 Stream Cypher: Diferență între versiuni
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(Pagină nouă: == Objective == Create a PLB peripheral for RC4 encryption and test attained acceleration when compared to a processor-only RC4 implementation. == References == http://en.wikipedia...) |
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Versiunea curentă din 14 martie 2013 07:56
Objective
Create a PLB peripheral for RC4 encryption and test attained acceleration when compared to a processor-only RC4 implementation.
References
http://en.wikipedia.org/wiki/RC4
Requirements
- Implement a circuit for RC4 acceleration in Verilog (integrated within a user_logic.v peripheral template)
- Implement a test-bench for the Verilog code
- Analyze FPGA resource utilization of your circuit
- Create an XPS system which uses the RC4 peripheral, implement the system and export it to SDK
- Create a C code project for processor-only RC4 encryption and test speed
- Create a C code project for accelerated RC4 encryption and test speed